1. Field
Example embodiments relate to a semiconductor device and a method of manufacturing the same, and, more particularly, to a semiconductor device having a cylindrical capacitor and a method of manufacturing the same.
2. Description of the Related Art
As the integration degree of semiconductor devices increases, the design rule of the semiconductor devices has been decreased and, thus, the cell size of the semiconductor memory devices has also been reduced. Particularly, DRAM (dynamic random access memory) devices, each of which includes a single access transistor and a single cell capacitor where electronic data is programmed in the cell capacitor, typically require a minimal capacitance for reading and programming the data in spite of the reduction of the occupation area of the capacitor.
A three-dimensional cylindrical capacitor has been widely used for obtaining the minimal capacitance for operating the DRAM device in view of area reduction of the cell size. In the cylindrical structure of the capacitor of the DRAM device, the surface area of electrodes of the capacitor can be enlarged as much as possible and, thus, the capacitance decrease may be reduced or minimized due to the increase of the surface area of the electrode. For example, a metallic capacitor of which the upper and/or lower electrodes comprise metal has been widely used for the capacitor of the DRAM device, and, more particularly, a metal-insulator-metal (MIM) capacitor has been most widely used for the capacitor of the DRAM device.
According to the conventional cylindrical MIM capacitor, a buried contact is prepared on a substrate in such a configuration that a source region of the underlying access transistor is connected to the buried contact and the lower electrode of the capacitor is formed on the buried contact. Particularly, a metal silicide layer may be interposed between the buried contact and the lower electrode so as to reduce contact resistance between the lower electrode comprising metal and the buried contact comprising polysilicon.
Particularly, a mold layer is formed on the substrate in such a configuration that the buried contact is exposed through an opening and a metal layer may be formed on the mold layer and, thus, the buried contact makes contact with the metal layer. Thereafter, the metal of the metal layer and the polysilicon of the buried contact react with each other by a consecutive thermal process to thereby form a metal silicide layer on the buried contact. Then, a metal nitride layer is formed on the mold layer and the metal silicide layer and, thus, metals for a lower electrode may not penetrate into the mold layer, the metal silicide layer and the buried contact. Thereafter, the metals are formed on the metal nitride layer as the lower electrode of the capacitor.
However, when a high-temperature nitride process is performed on the metal silicide in a subsequent process, the metal silicide layer is partially agglomerated and, thus, the sheet resistance of the metal silicide layer is rapidly increased. At worst, the metal silicide layer is partially broken at the agglomeration portion and, thus, the lower electrode is electrically shorted from the buried contact. Accordingly, high sheet resistance of the metal silicide layer usually prohibits a desired operation performance of the DRAM device and eventually leads to operation failures of the memory device, which reduces manufacturing yield of the device. In addition, the increase of the sheet resistance of the metal silicide layer due to the agglomeration much more frequently occurs as the line width of the pattern of the memory device decreases.
Further, when the conventional nitride process is performed at a high temperature of about 600° C. to about 850° C., the dopants of the source/drain regions are also prevented from activating to thereby increase the channel resistance under the gate electrode of the memory device. That is, the high temperature nitride process causes the increase of the channel resistance under the gate electrode due to the inactivation of the dopants as well as the increase of the sheet resistance of the metal silicide layer on the buried contact due to the agglomeration.
Accordingly, there is still a need for an improved formation method of the metal silicide layer on the buried contact by which the metal silicide layer has a much more improved thermal stability, so that the metal silicide layer is sufficiently prevented from agglomerating and the dopants of the source/drain regions are sufficiently prevented from inactivating in a subsequent high temperature process.